| |
Keynotes & Panels
15th International System-on-Chip
(SoC)
Conference, Exhibit & Workshops
The Theme for This
Year’s Conference Is “Secure and Intelligent Silicon Systems for Emerging
Applications."
|

|
To present and/or exhibit at this
highly-targeted International System-on-Chip (SoC) Conference, please contact:
949-981-1837 or SoC.Conf.Update@Gmail.com |
a
|
a
Click Here To
Download The UCI Campus Map
Directions &
Parking for Calit2 Building at the University of California, Irvine (UCI)
a
Platinum Sponsors
a
|
|
|
|
|
|
|
Schedule & Program Summary
|
|
|
|
SoC Conference Day 1 |
Wednesday, October 18, 2017
UCI - Calit2 Building |
8:30 am - 6:00 pm |
|
|
SoC Conference Day 2 |
Thursday, October 19, 2017
UCI - Calit2 Building |
8:30 am - 6:00 pm |
|
|
SoC Tabletop Exhibit &
Reception |
Wednesday, October 18, 2017
UCI - Calit2 Building |
2:00 pm - 7:00 pm |
|
|
|
|
|
|
a
|
Purdue University
Keynote
 |
Dr.
Eugenio Culurciello, Associate Professor, Electrical Engineering. Purdue
University.
@ Weldon School of Biomedical
Engineering
@
School of Electrical and Computer Engineering
@
School of Mechanical Engineering
@
College of Health & Human Sciences
Keynote: “Artificial Intelligence: past, present, future.?”
Abstract: Deep Learning
and neural networks are quickly becoming a dominant unified algorithm to
extract information from unstructured data. Using standard gradient-descent
learning algorithms and scalable models, they have been a revolution in
image understanding, video summarization, captioning, scene understanding,
speech recognition, text translation, and many more success stories coming
on a almost daily basis! We will discuss how we can progress the field into
more general artificial intelligence, so that these algorithms can continue
to solve problems for us and take on more and more complex applications.
Bio: Eugenio Culurciello
(S'97-M'99) received the Ph.D. degree in Electrical and Computer Engineering
in 2004 from the Johns Hopkins University, Baltimore, MD. He is an associate
professor of the School of Electrical and Computer Engineering, the Weldon
School of Biomedical Engineering, the School of Mechanical Engineering, and
of Psychological Sciences in the College of Health & Human Sciences at
Purdue University, where he directs the ‘e-Lab’ laboratory. His research
focus is in artificial vision systems, deep learning, hardware acceleration
of vision algorithms. His research interests include: analog and mixed-mode
integrated circuits for biomedical instrumentation, synthetic vision,
bio-inspired sensory systems and networks, biological sensors,
silicon-on-insulator design. Eugenio Culurciello is the recipient of The
Presidential Early Career Award for Scientists and Engineers (PECASE), the
Distinguished Lecturer of the IEEE (CASS), and is the author of the book
"Silicon-on-Sapphire Circuits and Systems, Sensor and Biosensor interfaces"
published by McGraw Hill in 2009, and "Biomedical Circuits and System,
Integrated Instrumentation" published by Lulu in 2013. Info: https://engineering.purdue.edu/elab/
In 2013 Dr. Culurciello founded TeraDeep http://teradeep.com/, a company
focused on the design of deep neural network processors. In 2016 Dr.
Culurciello founded FWDNXT http://fwdnxt.com/, to deliver the next
generation synthetic brains for artificial intelligence.
|
|
|
Microsemi
Keynote

|
Ted
Speers, VP and Head of Product Architecture and Planning for Microsemi SoC
Group.
“RISC-V Challenges and
Possibilities.”
Abstract: The talk will
focus on changes in technology, applications, and economics of the SoC
ecosystem, and what it will likely mean for the realization of these devices
in the next decade. It will examine the way process technology, packaging
technology, design abstraction, and other such factors of true
differentiation will push these core devices. These observations are
intended to provide insights into where to position your company and career
for the coming decade.
Bio: Ted Speers is Head of
Product Architecture and Planning for Microsemi’s SoC Group, responsible for
defining their roadmap for low power, secure, reliable FPGAs and SoC FPGAs.
He joined Microsemi in 1987 and held roles in process engineering and
product engineering before assuming his current role in 2003. He is a
Technical Fellow and co-inventor on 35 US Patents. Prior to joining
Microsemi, he worked at LSI Logic. Ted has a BS in Chemical Engineering from
Cornell.
|
|
|
Intel
Keynote
 |
Cormac
Brick, Director of Machine Intelligence, Movidius Group, Intel Corporation.
Keynote: “Designing
for Deep Learning Inference in Power Constrained Environments.”
Abstract: TBD.
Bio: Cormac Brick is Director
of Machine Intelligence in the Movidius group at Intel Corporation, where he
builds new foundational algorithms for computer vision and machine
intelligence to enhance the Myriad VPU product family. Cormac contributes to
internal architecture, and helps customers build products using very latest
techniques in deep learning and embedded vision through a set of advanced
applications and libraries. Cormac has worked with Movidius since its early
days and has contributed heavily towards the design of the ISA, hardware
systems design, computer vision software development and tools. Cormac has a
B.Eng. in Electronic Engineering from University College Cork.
|
|
|
Panel #1
|
Wednesday,
October 18, at
4:30
Panel #1 |
|
|
Panel






|
Panel:
“Specialized
Processors vs. General Purpose Cores: How to Achieve Performance
Requirements for Emerging Applications (including AI, Deep Learning,
Security, and Machine Intelligence).”
Moderator: Farhad Mafie, SoC Conference Chairman.
Panelists:
1. Cormac
Brick, Director of Machine Intelligence in the Movidius Group, Intel
Corporation.
2. Dr. Rino Micheloni is Engineering Fellow at Microsemi Corporation.
3. Jauher Zaidi, Chairman & Chief Innovation Officer, Palmchip Corporation.
4. Ted
Speers, VP and Head of Product Architecture and Planning for Microsemi SoC
Group.
5. Professor Eugenio
Culurciello, Associate Professor, Electrical Engineering. Purdue University.
6. Abdullah Raouf, Sr. Product Marketing Manager, Lattice Semiconductor.
This
Panel Is Open To Everyone . . . Register Online for FREE Panel Pass
More
Updates Coming Soon . . .
Several
Opportunities to Win various Prizes During this Panel Discussion . . .
Don't
Miss Out!
|
|
|
Savant Company Inc.

SoC
Conference
|
Farhad
Mafie, SoC Conference Chairman.
Moderator
Bio: Farhad Mafie is SoC
Conference Chairman. He has over 20 years of experience in semiconductor and
computer businesses and more than 10 years of university-level teaching
experience. He is the former Vice President of Marketing and Engineering at
Toshiba Semiconductor. He has also worked in strategic marketing, project
and design engineering at Lucent Technologies, Unisys, and MSI Data. Farhad
has a Master of Science and a Bachelor of Science degree in Electronic
Engineering from California State University, Fullerton. He is an author and
a translator, and his articles have been published in a variety of journals
and Web-based magazines on technology and political affairs. In 2003, he
published the biography of Iranian poet and Nobel nominee who lived in
exile, Nader Naderpour (1929-2000), Iranian Poet, Thinker, Patriot. Farhad
is also Editor-in-Chief for the CRC Press SoC Design and Technologies Book
Series, which includes (1) Low-Power NoC for High-Performance SoC Design and
(2) Design of Cost-Efficient Interconnect Processing Units. Farhad is an
active member of IEEE, and he is the chair of IEEE Orange County Solid-State
Circuits Society (SSCS), as well as IEEE Orange County Entrepreneurs'
Network (OCEN). He is also a member of two UCI Advisory Committees:
Communication System Engineering and Embedded System Engineering Certificate
Programs.
|
|
|
Microsemi

|
Dr.
Rino Micheloni, Engineering Fellow at Microsemi Corporation.
Panelist
Bio: Dr. Rino Micheloni is Engineering Fellow at Microsemi Corporation where
he currently runs the Non-Volatile Memory Lab in Milan, with special focus
on NAND Flash. Prior to joining Microsemi, he was Fellow at PMC-Sierra,
working on NAND Flash characterization, LDPC, and NAND Signal Processing as
part of the team developing Flash controllers for PCIe SSDs. Before that, he
was with IDT (Integrated Device Technology) as Lead Flash Technologist,
driving the architecture and design of the BCH engine in the world’s 1st
PCIe NVMe SSD controller. Early in his career, he led NAND design teams at
STMicroelectronics, Hynix, Infineon, and Qimonda; during this time, he
developed the industry’s first MLC NOR device with embedded ECC technology
and the industry’s first MLC NAND with embedded BCH. Rino is IEEE Senior
Member, he has co-authored more than 50 publications, and he holds 242
patents worldwide (including 120 US patents). He received the
STMicroelectronics Exceptional Patent Award in 2003 and 2004, and the
Qimonda IP Award in 2007.
Rino has published the following books with Springer: 3D Flash Memories
(2016), Inside Solid State Drives (2013), Inside NAND Flash Memories (2010),
Error Correction Codes for Non-Volatile Memories (2008), Memories in
Wireless Systems (2008), and VLSI-Design of Non-Volatile Memories (2005).
|
|
|
Intel
 |
Cormac
Brick, Director of Machine Intelligence, Movidius Group, Intel Corporation.
Panelist
Bio: Cormac Brick is Director
of Machine Intelligence in the Movidius group at Intel Corporation, where he
builds new foundational algorithms for computer vision and machine
intelligence to enhance the Myriad VPU product family. Cormac contributes to
internal architecture, and helps customers build products using very latest
techniques in deep learning and embedded vision through a set of advanced
applications and libraries. Cormac has worked with Movidius since its early
days and has contributed heavily towards the design of the ISA, hardware
systems design, computer vision software development and tools. Cormac has a
B.Eng. in Electronic Engineering from University College Cork.
|
|
|
Microsemi

|
Ted
Speers, VP and Head of Product Architecture and Planning for Microsemi SoC
Group.
Panelist
Bio:Ted Speers is Head of
Product Architecture and Planning for Microsemi’s SoC Group, responsible for
defining their roadmap for low power, secure, reliable FPGAs and SoC FPGAs.
He joined Microsemi in 1987 and held roles in process engineering and
product engineering before assuming his current role in 2003. He is a
Technical Fellow and co-inventor on 35 US Patents. Prior to joining
Microsemi, he worked at LSI Logic. Ted has a BS in Chemical Engineering from
Cornell. |
|
|
Purdue University
 |
Dr.
Eugenio Culurciello, Associate Professor, Electrical Engineering. Purdue
University.
Panelist
Bio: Eugenio Culurciello
(S'97-M'99) received the Ph.D. degree in Electrical and Computer Engineering
in 2004 from the Johns Hopkins University, Baltimore, MD. He is an associate
professor of the School of Electrical and Computer Engineering, the Weldon
School of Biomedical Engineering, the School of Mechanical Engineering, and
of Psychological Sciences in the College of Health & Human Sciences at
Purdue University, where he directs the ‘e-Lab’ laboratory. His research
focus is in artificial vision systems, deep learning, hardware acceleration
of vision algorithms. His research interests include: analog and mixed-mode
integrated circuits for biomedical instrumentation, synthetic vision,
bio-inspired sensory systems and networks, biological sensors,
silicon-on-insulator design. Eugenio Culurciello is the recipient of The
Presidential Early Career Award for Scientists and Engineers (PECASE), the
Distinguished Lecturer of the IEEE (CASS), and is the author of the book
"Silicon-on-Sapphire Circuits and Systems, Sensor and Biosensor interfaces"
published by McGraw Hill in 2009, and "Biomedical Circuits and System,
Integrated Instrumentation" published by Lulu in 2013. Info: https://engineering.purdue.edu/elab/
In 2013 Dr. Culurciello founded TeraDeep http://teradeep.com/, a company
focused on the design of deep neural network processors. In 2016 Dr.
Culurciello founded FWDNXT http://fwdnxt.com/, to deliver the next
generation synthetic brains for artificial intelligence.
|
|
|
Lattice Semiconductor

|
Abdullah
Raouf, Sr. Product Marketing Manager, Lattice Semiconductor.
Panelist
Bio: Abdullah Raouf is a
senior product marketing manager for Lattice Semiconductor focused on FPGA
and ASSP solutions for mobile markets. He has more than a decade of
experience in semiconductor product management and holds a Bachelor of
Science degree in Electrical Engineering from UC Davis and an MBA from Santa
Clara University. |
|
|
Palmchip
 |
Jauher
Zaidi, Chairman & Chief Innovation Officer, Palmchip Corporation.
Panelist.
Bio: Jauher expert in
Cyber Security, Storage and SoC design. He has over 33 years of experience
in executive management and entrepreneurship. He helped start several
hi-tech companies name a few, Palmchip, ESilicon, SandForce, Netvinci, and
Moobila. He has written and presented a number of articles and papers on
Cyber Security, SoC, IP business model, and future business and technology
trends. He has also participated in many system-on-chip panels, and is a
recognized expert in the area of SoC development. He invented the CoreFrame
SoC memory centric Architecture. Which has enabled over 2 billion SoCs. He
is a board of Adviser for Savant Company, a leader in International
System-on-Chip conferences. He holds several patents on Cyber Security, SoC
technology and infrastructure. The EE Times, a well-known industry
publication, named him twice among the 'Top 20 visionary CEOs’ in the world.
He is recipient of 2010 Terman Technology award for his Cloud computing
innovation. He was 1st place award out of 34 cloud Applications.
Specialties: Startup, Entrepreneurship, Management, Financing, SoC
Technology and Chip design, Sales and Marketing, Fund raising, Startups. IT
outsourcing, Cloud Computing, Mobile (IPhone, Android) applications.
|
|
|
Panel #2
|
Thursday,
October 19, at
4:30
Panel #2 |
|
|
Panel







"FREE"
|
Panel:
“Security Issues and Challenges in The Next Generation of SoC Designs for
Emerging Applications. Can You Make Cents of It?"
Moderator: Farhad Mafie, SoC Conference Chairman.
Panelists:
1.
Dr. Pim Tuyls, Founder and Chief Executive
Officer, Intrinsic ID.
2. Marc Canel, Vice President, Security Technologies, ARM.
3. Louis Parks – President and CEO, SecureRF
4. Dr.
Hoon Choi, Design Engineer Senior Director, Lattice Semiconductor.
5. Asaf
Ashkenazi, Vice President, IoT security products, Rambus Security Division.
6. Michael
Y. Chen, Director, Design for Security Business Unit, New Ventures Division,
Mentor Graphics Corporation.
This
Panel Is Open To Everyone . . . Register Online for FREE Panel Pass
More
Updates Coming Soon . . .
Several
Opportunities to Win various Prizes During this Panel Discussion . . .
Don't
Miss Out! |
|
|
Savant Company Inc.

SoC
Conference
|
Farhad
Mafie, SoC Conference Chairman.
Moderator
Bio: Farhad Mafie is SoC
Conference Chairman. He has over 20 years of experience in semiconductor and
computer businesses and more than 10 years of university-level teaching
experience. He is the former Vice President of Marketing and Engineering at
Toshiba Semiconductor. He has also worked in strategic marketing, project
and design engineering at Lucent Technologies, Unisys, and MSI Data. Farhad
has a Master of Science and a Bachelor of Science degree in Electronic
Engineering from California State University, Fullerton. He is an author and
a translator, and his articles have been published in a variety of journals
and Web-based magazines on technology and political affairs. In 2003, he
published the biography of Iranian poet and Nobel nominee who lived in
exile, Nader Naderpour (1929-2000), Iranian Poet, Thinker, Patriot. Farhad
is also Editor-in-Chief for the CRC Press SoC Design and Technologies Book
Series, which includes (1) Low-Power NoC for High-Performance SoC Design and
(2) Design of Cost-Efficient Interconnect Processing Units. Farhad is an
active member of IEEE, and he is the chair of IEEE Orange County Solid-State
Circuits Society (SSCS), as well as IEEE Orange County Entrepreneurs'
Network (OCEN). He is also a member of two UCI Advisory Committees:
Communication System Engineering and Embedded System Engineering Certificate
Programs.
|
|
|
ARM
Panelist

|
Marc
Canel, VP security systems in ARM’s SW and Systems group.
Panelist
Bio: Marc Canel has extensive
experience in the mobile devices industry, driving software projects for the
past 25 years, focusing on how mobile devices work with the Enterprise
world. He is Vice President of Security Systems at ARM Inc for the past 2.5
years, leading the next generation of security architectures to become the
foundation for Enterprise applications in a connected world. He promoted the
definition of Trust systems and standards for devices in the Internet. He
defined the architecture for the next generation Root of Trust for
applications in devices. Prior to ARM Inc, he was Vice President of Software
& Security Systems at Qualcomm where he spent 18 years, focusing on the
features that make the products of Qualcomm more attractive to Enterprises.
He led Qualcomm to become a leader in the area of content protection and
privacy management. He also worked on the software ecosystem management of
Qualcomm, supporting the OEMs customers looking for complete solutions.
Prior to Qualcomm, he was at IBM for 12 years where he had various roles in
product development and management roles in data networking products.
|
|
|
Intrinsic ID
Panelist

|
Dr.
Pim Tuyls, Founder and Chief Executive Officer, Intrinsic ID.
Panelist
Bio: Dr. Pim Tuyls
initiated work on Hardware Intrinsic Security™ within Philips Research in
2002. As a principal scientist, he managed the cryptography cluster in
Philips Research in which the initial research was carried out. Later he
transferred this work to Intrinsic-ID and headed the technology development.
Since 2004, Pim is a visiting professor at the COSIC institute of the
Katholieke Universiteit Leuven. His inventions have resulted in numerous
patents. He is widely accepted for his work in the security field and
Hardware Intrinsic Security in particular. Several of Pim’s papers
relating to secure implementations of Physical Unclonable Functions (PUF)
technology have been published at leading security conferences. He
co-authored the book Security with Noisy Data, which was published by
Springer in 2007.
|
|
|
SecureRF
Panelist

|
Louis
Parks – President and CEO, SecureRF.
Panelist
Bio: Mr. Parks is
a co-founder of SecureRF, and serves as its President and Chief Executive
Officer. He also serves on the company’s Board of Directors and its
Chairman. Prior to joining SecureRF, Mr. Parks was the Senior Vice President
of Marketing and Strategy for Global Logistics Technology, Inc. (“G-Log”),
an innovative internet logistics company that was acquired by Oracle
Corporation. For 10 years preceding G-Log, he was CEO/President of Client
Technologies, Inc., a New York-based provider of Customer Relationship
Management (CRM) applications for the financial sector that was acquired by
a Canadian company. Mr. Parks also served as President of RKO/Warner Video
where he was responsible for technology, operations and acquisitions
throughout North America. Early in his career, he held both sales and
engineering positions with IBM. Mr. Parks has consulted to Homeland Security
on U.S. electronic border initiatives and has served as a resource to the
White House on security issues related to the new electronic passports and
passport cards. He is on the North American Board of AIM, the Association
for Automatic Identification and Mobility, and is the former chairman of its
RFID Experts Group (REG). He was on the Board of Advisors of the National
Center for Aerospace Leadership (NCAL), a partnership between US industry,
academia and government teams, and is currently an active member on the GS1/EPCglobal
and US TAG ISO standards committees.
Mr. Parks holds a Bachelor of Commerce (with Honors) in Finance and
Marketing from the University of Manitoba.
|
|
|
Lattice Semiconductor
Panelist

|
Dr.
Hoon Choi, Design Engineer Senior Director, Lattice Semiconductor.
Panelist
Bio: Hoon Choi is a
Design Engineer Senior Director at Lattice Semiconductor, where he is
involved in the spec and design of multiple generations of HDMI for the last
13+ years. Choi has led the design of HDCP 2.2 on the HDMI and compliance
test spec. Additionally, he led the spec and implementation of UCP
(China-CP) and the authentication implementation activity for Type-C. Prior
to joining Lattice, Choi got his Ph.D from KAIST in Korea then began his
career in the technology industry by working for Samsung Electronics,
NeoPace Telecom, and Silicon Image which was acquired by Lattice. |
|
|
Rambus
Panelist

|
Asaf
Ashkenazi, Vice President, IoT security products, Rambus Security Division.
Panelist
Bio: Asaf Ashkenazi is a vice
president for IoT security products at Rambus Security division. In this
role, Asaf is responsible for the product definition, strategy and marketing
of Rambus IoT security products. Asaf brings more than 15 years of security
experience to the organization, spanning product management, business
development and various engineering roles throughout his career. Prior to
joining Rambus, Asaf oversaw product management for all of the security
products at Qualcomm Technologies Inc. Asaf began his career at Motorola
Semiconductor where he developed hardware security modules. Previously, Asaf
served as Chief Security Architect at Freescale Semiconductor (now NXP), and
has served as board member of the FIDO alliance. Asaf holds a Bachelor of
Science in Electrical Engineering from Ben-Gurion University of the Negev,
Israel, and has been granted 10 U.S. patents for security architectures and
solutions.
|
|
|
Mentor Graphics
Panelist

|
Michael
Y. Chen, Director, Design for Security Business Unit, New Ventures Division,
Mentor Graphics Corporation.
Panelist
Bio: Michael Chen
is currently a Business Unit Director in the New Ventures Division at Mentor
Graphics. As such, Michael manages leading-edge technology efforts for the
company’s Design for Security initiative. Michael’s other positions during
his more than 20 years at Mentor include serving as an account manager,
field marketing manager for Asia Pacific, product line director for various
products, and business unit director for SoC verifications products, with
responsibility for HW/SW integration and electronic system-level design and
verification solutions. Prior to joining Mentor, Michael was a senior
consultant and field application engineer at Hewlett Packard and a logic
simulator programmer for Xerox. He is a licensed Professional Engineer and
holds several patents. He currently serves as Chair of the T3S TAB committee
with the Semiconductor Research Corporation (SRC). Michael holds a B.S.E.E.
and a B.S. in Information and Computer Science from the University of
California, Irvine, graduating with honors. He is fluent in both Mandarin
Chinese and Japanese and is well versed in both of those cultures.
|
|
|
|
|
|
* * * * * * *
Back To The Main SoC
Conference Page
Copyright © 2003-2018 by Savant Company Inc. All
Worldwide Rights Reserved.
| |
|