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The 14th International System-on-Chip (SoC)

Conference, Exhibit & Workshops

 October 19 & 20, 2016

University of California, Irvine (UCI) - Calit2

13th International SoC Conference In Pictures. . .

         
 
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Keynotes

 

11th International System-on-Chip (SoC)

Conference, Exhibit & Workshops

 

The Theme for This Year’s Conference Is “Emerging Complex SoC Platforms, and Mixed-Signal SoC Design Challenges.”

 

10th International SoC Conference In Pictures. . .

 

If you have any questions or need more information, please contact:

SoC@SavantCompany.com or 949-851-1714   ―  Thank you!

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Directions & Parking for Calit2 Building at the University of California, Irvine (UCI)
 

For questions regarding the SoC Conference Keynotes, Presentations, and Panelists  opportunities, as well as Sponsorship & Tabletop Exhibit opportunities, please contact:

 

SoC@SoCconference.com   or   949-851-1714

 

 

 

Nokia

 

 

Keynote

 

 

 

 

 

 

Dr. John Paul Shen, Nokia Fellow, Founding Head of Nokia Research North America Lab.
 

 

Keynote: “Mobile Computing Mega Trends and Major Challenges.”

 

 

Bio: John P. Shen is a Nokia Fellow (7th in the company) and was the founding director of Nokia Research Center - North America Lab (formerly NRC Palo Alto) with research teams pursuing a very wide range of research projects in mobility and mobile computing. Prior to joining Nokia in 2006, John was the Director of the Microarchitecture Research Lab at Intel. Prior to joining Intel in 2000, John was a tenured Full Professor in the Electrical and Computer Engineering Department at Carnegie Mellon University, where he supervised a total of 17 PhD students and dozens of MS students, received multiple teaching awards, and published two books and more than 100 research papers. One of his books, “Modern Processor Design: Fundamentals of Superscalar Processors” (McGraw-Hill 2005) is still being used in the EE382 Advanced Processor Architecture course at Stanford University. He is currently an adjunct professor at the CMU Silicon Valley campus.

 

Abstract: This talk highlights four mega trends for mobile computing and the associated challenges. (1) Mobility Dominates: mobile devices will be the technology and innovation driver; (2) Wireless Clouds: the dominant edge of the cloud will become wireless; (3) Big Data Curating: inundation of massive amounts of real-time mobile data; (4) Energy Efficiency: improving the ratio of {UserExperience/(EnergyxCost)} becomes the new scaling law of 2X every 2 years.

 

 

 

Microsemi

 

 

Keynote

 

 

 

 

 

 

Jim Aralis, Chief Technology Officer (CTO), and Vice President of R&D.
 

Keynote: "Living on the Edge (of the SoC)."

 

Abstract:  This presentation will outline the new process, processor, and packaging technologies that are enabling the expansion of mixed-signal SoC product development efforts. Subjects that will be covered include the optimization of design methodologies, mode partitioning, and process selection to maximize cost-savings, performance, and time-to-market. The presenter will also discuss how expertise in analog processing, signal conditioning, precision timing, and high speed wired and wireless communications design remain critical for designing differentiated products in an expanding and evolving digital environment.

 

Bio: Jim Aralis has served as chief technology officer and vice president of R&D for Microsemi since January 2007. He has more than 30 years experience in developing custom analog device and process technologies, analog and mixed-signal ICs and systems, and CAD systems.  Jim played a key role in transitioning Microsemi to a virtually fabless model, supporting multiple process technologies including, high voltage and high power BCD/CMOS, high power high integration CMOS, GaAs, SiGe, IPD, RF CMOS SoI, GaN, SiC, and several high-density packaging technologies.  From 2000 to 2007, Jim established and served as senior design director of Maxim Integrated Product’s engineering center in Irvine, Calif. Before that, he spent 7 years with Texas Instruments/ Silicon Systems as mixed-signal design head and senior principal engineer. Additional experience includes 11 years with Hughes Aircraft Company in positions of increasing responsibility including senior scientist.  Jim earned a bachelor of science degree in Math Applied Science and Physics and a master of science in electrical engineering from UCLA. He holds 9 patents for circuit and system design.

 

 

Intel

 

 

Dr. Jeff Parkhurst, Program Director, Intel Science and Technology Centers.  

 

SoC Platform Opportunities and Challenges in the Big Data Economy.”

 

 

Abstract: Processing Big Data has been traditionally done at the Cloud Level. However, the paradigm is shifting as the need to both mine and process Big Data at the edge becomes paramount. This talk will explore a new Big Data ecosystem and discuss how it intersects with current SoC platforms including exploring future opportunities and challenges.


Bio: Dr. Jeff Parkhurst is the Program Director for three Intel Science and Technology Centers focusing on Embedded Computing, Cloud Computing and Big Data. He is responsible for managing the operational details in each center as well as aiding in direction setting of the research. The Program Director is the primary liaison between Intel and the universities on all operational matters including contracts, IP, space, logistics, funding, and technology/knowledge transfer. Prior to this assignment, Jeff was an Academic Research Programs Manager working with senior technologists internal and external to Intel setting research directions for the design science areas of the Semiconductor Research Corporation (SRC). Jeff received his BS from University of Nevada at Reno in 1983 and his MS from the University of California at Davis in 1988 and his PhD at Purdue University in 1994. Dr. Parkhurst is the author of numerous papers and one patent.

 

 

 

University of Pennsylvania
 

 

Keynote

 

 

 

 

 

 

Dr. Nader Engheta, H. Nedwill Ramsey Professor of Electrical and Systems Engineering.
 

"Seeing the Unseen: From polarization-sensitive eyes in nature to system-on-chip sensing and imaging devices."
 

Abstract: Certain animal species in nature have visual systems that are sensitive to light’s polarization – a capability that is lacking in the human eyes. The species with polarization vision can detect this characteristic of image-forming light and can extract its information. Polarization is obviously an important feature of optical signals, and can be affected by surface shapes, materials, local curvature, and relative location of sources and objects, and thus it can provide useful information about the observed scene and objects. What can one learn from this interesting ability of polarization sensing and detection in nature that has been evolved in certain biological visual systems? Understanding the biophysical mechanism behind the polarization vision and reverse engineering its functionality leads to exciting novel methods and techniques in sensing and imaging with various applications. Inspired by the features of polarization-sensitive visual systems in nature, we have been developing various man-made, non-invasive imaging methodologies, sensing schemes and visualization and display schemes that have shown exciting and promising outcomes with useful applications in system design in the optical and microwave domains. These techniques provide better target detection, enhanced visibility in otherwise low-contrast conditions, longer detection range in scattering media, polarization-sensitive adaptation based on changing environments, surface deformation-variation detection, “seeing” objects in shadows, and other novel outcomes and applications. In this talk, I will discuss several optical aspects of the biophysical mechanisms of polarization vision, and present sample results of our bio-inspired imaging methodologies. (In collaboration with Professor Jan Van der Spiegel’s group at UPenn.)

Bio: Recipient of 2013 SINA Award in Engineering and 2012 IEEE Electromagnetics Award, Nader Engheta is the H. Nedwill Ramsey Professor at the University of Pennsylvania with affiliations in the Departments of Electrical and Systems Engineering, Bioengineering, Physics and Astronomy, and Materials Science and Engineering. He received his B.S. degree from the University of Tehran, and his M.S and Ph.D. degrees from Caltech. Selected as one of the Scientific American Magazine 50 Leaders in Science and Technology in 2006 for developing the concept of optical lumped nanocircuits, he is a Guggenheim Fellow, an IEEE Third Millennium Medalist, a Fellow of IEEE, American Physical Society (APS), Optical Society of America (OSA), American Association for the Advancement of Science (AAAS), and SPIE-The International Society for Optical Engineering, and the recipient of 2013 Benjamin Franklin Key Award, 2008 George H. Heilmeier Award for Excellence in Research, the Fulbright Naples Chair Award, NSF Presidential Young Investigator award, the UPS Foundation Distinguished Educator term Chair, and several teaching awards including the Christian F. and Mary R. Lindback Foundation Award, S. Reid Warren, Jr. Award and W. M. Keck Foundation Award. His current research activities span a broad range of areas including metamaterials, nanophotonics, graphene optics, imaging and sensing inspired by eyes of animal species, optical nanoengineering, microwave and optical antennas, fractional operators in physics, and engineering and physics of fields and waves. He has co-edited the book entitled “Metamaterials: Physics and Engineering Explorations” by Wiley-IEEE Press, 2006. He was the Chair of the Gordon Research Conference on Plasmonics in June 2012.

 

 

Xilinx, Inc.

 

 

Keynote

 

 

 

 

 

 

Dr. Kees Vissers, Distinguished Engineer.

 

 

Keynote: “The future of Programming the Zynq SoC platform."

 

 

Abstract: In this keynote we will introduce the Zynq architecture, and we will show that this is ideally suited to program this architecture to become your own SoC. We will show the system architecture, the programming environment and the direction of next generation tools. We will illustrate how this is programmed starting with an algorithm in OpenCV. We will show an edge detection based motion detection application that is indicative for the workloads of embedded vision applications. We will show the mapping on the Zynq processor + FPGA fabric, and will show the performance in the range of 1 fps on Intel processors with OpenCV libraries, in the range of one frame per several seconds on the ARM processors, and a full 1080P 60fps for the implementation on the FPGA. We will show the measured low power consumption of the total system.  

 

Bio: Kees Vissers graduated from Delft University in the Netherlands. He worked at Philips Research in Eindhoven, the Netherlands, for many years. The work included Digital Video system design, HW –SW co-design, VLIW processor design  and dedicated video processors. He was a visiting industrial fellow at Carnegie Mellon University, where he worked on early High Level Synthesis tools. He was a visiting industrial fellow at UC Berkeley where he worked on several models of computation and dataflow computing. He was a director of architecture at Trimedia, and CTO at Chameleon Systems. Today he is heading a small team of researchers at Xilinx. The research topics include next generation programming environments for processors and FPGA fabric, high-performance video systems,  wireless applications and new datacenter applications.

 

 

       

 

 

 

 

 

 

 

 

 

 

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