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The 14th International System-on-Chip (SoC)

Conference, Exhibit & Workshops

 October 19 & 20, 2016

University of California, Irvine (UCI) - Calit2

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Welcome to . . .


2nd International System-on-Chip (SoC) Conference & Exhibition

November 3 & 4, 2004

Crowne Plaza Hotel - Milpitas, California



Who Should Attend?  
  • Design engineers
  • Technical and marketing professionals
  • Executives and business decision-makers in technology companies
  • ASIC/SoC designers
  • System architects
  • System platform designers
  • Engineering professors and students


Anyone who needs the latest information on SoC-related technologies, configurable CPUs and DSPs for SoC design, semiconductor possibilities, 90nm and sub-90nm challenges, EDA tools for Nanometer SoCs, SoC platform design, and IP suppliers.



SoC Sponsors and Presenters (a partial list)



[Platinum Sponsor]



[Platinum Sponsor]



[Gold Sponsor]



[Gold Sponsor]

Intel Wasabi Systems IBM
Freescale ARM iSuppli
Mentor Graphics Cadence Design Systems Synopsys
Toshiba Texas Instruments NEC Electronics
LSI Logic Atrenta Magma
Open Silicon


(Emulation and Verification Engineering)

Chip Design Tharas Systems Synplicity
VSI Alliance ARC International Si2
SMT EDACafe BioChipNet
Advanced Packaging SOCcentral Embedded Computing Design
Cal State San Jose Stanford University Cal State Fullerton
OCP International Partnership Semiconductor Online Open SystemC Initiatives
AqTrack DSP & FPGA Magazine Tripylon Networks
OCBC   AmerNet Inc.


SoC Conference Information


SoC Tabletop Exhibit Information

  • Meet one-on-one with SoC experts representing a wide variety of companies.
  • Have your toughest questions answered by leading-edge companies!
  • Discuss development tools and design challenges with SoC experts.
  • Connect with companies offering practical solutions to your design challenges.
  • "Seeing Is Believing!" See demos of EDA tools from leading-edge EDA vendors.

Keynote Speeches by:

  • Dr. Giovanni De Micheli, Stanford University

  • Dr. Ivo Bolsens, Chief Technical Officer, Xilinx

  • Robert Hum, Vice President & General Manager of Design Verification and Test, Mentor Graphics

  • Dr. Juan-Antonio Carballo, Venture Strategy Executive, IBM

Four Informative Tracks

  • New Trends and Approaches in ASIC and SoC Design

  • EDA Tools and Methodologies for 90nm and Beyond

  • Revitalizing the IP Model for SoC/ASIC Design

  • CPUs and DSPs for SoC Platform Design

Why You Should Attend

  • Discuss 90nm and post-90nm challenges.
  • Learn about the latest EDA Tools for Nanometer SoCs.
  • Hear recognized industry experts discuss current SoC trends and practices.
  • Discover the next generation of SoC platform designs from leading-edge companies.
  • Learn about the latest configurable CPUs and DSPs for SoC platforms from major technology companies.
  • Be among the first to hear public disclosures of new technologies, IPs, and EDA tools for SoC design.

Your Key Benefits

  • Gain insight into hidden SoC issues.
  • Network with the leaders driving SoC technology.
  • Learn about the future direction of System-on-Chip.
  • Network with fellow System-on-Chip engineers.
  • Challenge the experts! Attend panel discussions on "Configurable CPUs and DSPs for SoC Platform Designs" and "EDA Tools for 90nm."

Conference Registration




Package Includes

Early Bird Registration  Ends  10/22/2004


After 10/22/2004

Full 2-Day Conference Package

All Sessions, All Panels, Exhibits, Handouts, Lunches



Wednesday Only

Wednesday's Sessions, Panel, Exhibits Handouts, Lunch



Thursday Only

Thursday's Sessions, Panels, Handouts, Lunch



25% Student Discount (Full 2-Day Conference Package Only)*

All Sessions, All Panels, Exhibits, Handouts, Lunches



Exhibits Only

Free Pass to Exhibits ONLY


With Exhibit Registration


With Exhibit Registration

* Student registrations: Valid student picture ID will be required to pick up registration packages on Wednesday morning (no Substitution). 

Policies: Cancellations, substitutions, and requests for refund will not be accepted by telephone and must be submitted in writing for consideration. Cancellations and refunds will be considered only if submitted in writing and only if received by the following deadline: Cancellations received by Friday 9/15/04 Full refund, less a $100 processing fee. Cancellation received after Friday 9/15/04 No refund.  Badge substitution: $50 charge. All cancellations and substitutions must be submitted in writing to: Savant Company Inc. SoC Registration, P.O. Box 51330, Irvine, CA 92619.



Date: November 3 and 4, 2004

Location: Crowne Plaza San Jose / Silicon Valley, Milpitas, California

For information, please contact: SoC@savantcompany.com

Wafer image courtesy of Xilinx Corporation. Unauthorized use not permitted.  Copyright 2004 by Savant Company Inc. All rights reserved. 






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